Silicon carbide (SiC) is a high-hardness semiconductor material having a band gap larger than that of silicon (Si), and is applied to various semiconductor devices such as a power element, an environmentally-resistant element, a high-temperature operation element, and a high-frequency element. Among these elements, application to power elements, such as a switching element and a rectifier element, is gaining attention. Power elements using SiC have an advantage that they can significantly reduce power loss, compared to power elements using Si.
Typical switching elements among power elements using SiC are a metal-oxide-semiconductor field-effect transistor (MOSFET) and a metal-semiconductor field-effect transistor (MESFET). Such switching elements can switch between an on-state where a drain current of several amperes (A) or more flows and an off-state where no drain current flows based on a voltage applied to a gate electrode. The elements using SiC can achieve a high breakdown voltage of several hundreds (V) or more in the off-state. Schottky diodes and pn diodes have been also reported as the rectifier elements, and have been expected as the rectifier elements that can achieve a large current and high breakdown voltage.
Many of such power elements have a structure in which a current flows in the front-back direction of surfaces of a substrate. In most of the structures, the front surface is patterned using a photoresist whereas an ohmic junction is substantially entirely formed on the back surface.
When such power elements are modularized, an electrode on a back surface thereof and an interconnect layer of a module substrate are connected together through a conductive material such as solder to form a bonded portion on the entire surface. Therefore, during an operation, a thermal stress is applied according to a thermal expansion coefficient difference between a power element (Si, SiC, GaN, etc.) and an interconnect layer material (mainly copper, etc.), posing a problem in reliability of the bonded portion.
In order to improve reliability of the bonded portion, a method has been considered in which a part of a back surface of a substrate which corresponds to the outer peripheral portion of a chip is half-cut with a dicer to a recess in advance before dicing is performed, and the recess is filled with solder when dicing and mounting are performed, thereby increasing the thickness of a region of the solder layer around the outer peripheral portion of the chip to improve reliability of the bonded portion (see Patent Documents 1 and 2).